In a statement released on Saturday, MediaTek said Yu will support the company in “exploration and roadmap planning for future advanced packaging technologies,” while also helping guide research, development, and investment strategy linked to next-generation chip packaging.
Veteran TSMC Engineer With Deep Packaging Expertise
Yu brings decades of experience from TSMC, where he worked from 1994 until his retirement in 2025. During his tenure, he held multiple backend research and development roles and was closely involved in the development of key advanced packaging technologies.
One of his most significant contributions was to CoWoS (Chip on Wafer on Substrate), a high-end packaging method that has become central to modern AI chip design and high-performance computing systems.
CoWoS technology is widely used in AI accelerators, including chips from major industry players such as Nvidia, helping integrate multiple chip components into a single high-performance system. However, global demand for CoWoS capacity has significantly outpaced supply in recent years.
High Demand for Advanced Packaging Driving Industry Competition
Advanced packaging has become one of the most critical bottlenecks in the global semiconductor supply chain, particularly as AI workloads require increasingly powerful and efficient chip architectures.
TSMC’s CoWoS capacity has been heavily oversubscribed, with cloud providers and AI chip developers competing aggressively for access. This constraint has created strategic pressure across the industry, forcing companies to rethink supply chain planning and long-term capacity partnerships.
MediaTek’s decision to bring in a veteran from this field highlights how important packaging technology has become in determining competitiveness in the AI chip era.
MediaTek’s AI Expansion Strategy
The advisory appointment comes as MediaTek continues to push into higher-value segments of the semiconductor market, particularly AI accelerators and application-specific integrated circuits (ASICs).
Last week, the company stated that it expects its AI accelerator ASIC business to generate “multiple billions of dollars” in revenue by 2027, reflecting growing confidence in its ability to compete in the fast-expanding AI hardware ecosystem.
Rather than focusing solely on traditional mobile chipsets, MediaTek has been repositioning itself toward data center and AI infrastructure opportunities, where demand growth has been significantly stronger.
Outlook: Positioning for the Next Phase of AI Hardware Growth
The addition of Yu signals a broader industry trend: advanced packaging is increasingly becoming as strategically important as chip design itself. As AI models scale, performance gains are now driven not just by transistor improvements, but by how efficiently multiple chips are integrated and packaged together.
For MediaTek, the move represents a deliberate effort to strengthen its technical depth in this area as it competes in a market still dominated by established leaders like TSMC in manufacturing and Nvidia in AI computing platforms.
With AI infrastructure demand continuing to accelerate, control over packaging technology and supply chain integration is likely to remain a key battleground in the semiconductor industry.