Researchers at Qutech have introduced a new quantum chip architecture designed to streamline the testing and scaling of semiconductor spin qubits, a key step toward practical quantum computing.

The platform, named the Qubit-Array Research Platform for Engineering and Testing (Qarpet), features a tiled grid of qubit units arranged in a crossbar layout. This configuration allows hundreds of qubits to be characterized on a single chip under realistic operating conditions, bringing quantum hardware closer to the density and complexity of conventional semiconductor devices.

“With such a complex, tightly packed quantum chip, things really start to resemble the traditional semiconductor industry,” said Giordano Scappucci, the lead researcher at Qutech.

The demonstration device, built using a germanium/silicon-germanium heterostructure, incorporates a 23-by-23 array of tiles. Each tile houses two hole-spin qubits and a charge sensor, creating a repeatable unit that can be individually controlled via shared row and column lines. In total, the chip can accommodate up to 1,058 qubits while using just 53 control lines, demonstrating the efficiency of the crossbar approach.

The architecture achieves an estimated qubit density of around two million qubits per square millimeter, a figure that highlights its potential for highly scalable quantum computing. Using high-frequency electrical readout, the team successfully characterized a subset of 40 tiles, confirming that individual tiles can be precisely addressed and tuned.

According to the researchers, the modular design of Qarpet also supports testing of next-generation materials and automated tuning strategies, while remaining compatible with silicon-based qubits—a platform widely regarded as promising for industrial-scale quantum technologies.

Professor Scappucci emphasized that the crossbar layout could become a blueprint for future quantum processors, where large arrays of qubits must be efficiently managed and reliably controlled.

“The Qarpet architecture represents a step toward quantum chips that are not only larger but also more practical for engineering and testing purposes,” he said.